1. Field of the Invention
The present invention relates to a liquid crystal display device, and more particularly, to an array substrate of a liquid crystal display device including a storage capacitor having a large capacity.
2. Discussion of the Related Art
Corresponding to a recent trend in flat panel display research, a liquid crystal display device is widely used as a replacement medium which can overcome defects of a cathode ray tube (CRT) because of high contrast ratio, ability to display a gray and dynamic screen, and low power consumption.
The liquid crystal display device is a switching device for applying voltage to a pixel region and shielding the voltage. The liquid crystal display device includes an array substrate having a pixel electrode which is a region for transmitting light for applying a signal voltage to a liquid crystal layer, a storage capacitor for lowering a level shift voltage and maintaining pixel information during a nonselective period of voltage application; a color filter substrate including a common electrode for applying voltage to a liquid crystal layer according to a voltage difference between the pixel electrode, a color filter layer for displaying colors and selectively transmitting light, and a black matrix for shielding part of the light where an alignment of a liquid crystal is not controlled; and a liquid crystal injected between the array substrate and the color filter substrate.
The storage capacitor maintains a charged voltage in a liquid crystal capacitor in a turn-off section of a thin film transistor so as to prevent a picture quality from being lowered by parasitic capacitance. The storage capacitor is divided into a storage on common and a storage on gate according to a method for forming a capacitor electrode. In the former method, a storage capacitor electrode is additionally wired and connected to a common electrode, and in the latter method, a part of the n-1th gate line is used as a storage capacitor electrode of the nth pixel. The latter method is also called a previous gate method.
In the storage on gate method, a separate capacitor line does not exist, thereby providing a high aperture ratio. Also, since there is no overlapped part between a data line and a capacitor line, likelihood of an open being formed in data line is reduced, thereby providing high yield. However, since a complete dot-inversion and a column-inversion, etc. are not realized in view of the electric charge of the pixel, a picture quality is relatively deteriorated.
On the contrary, in the storage on common method, since a capacitor line is additionally formed, an aperture ratio is lowered, but a picture quality is enhanced. Accordingly, the storage on common method is more appropriate in a liquid crystal display device if a problem of a low aperture ratio is to be solved.
Hereinafter, the related art array substrate of a liquid crystal display device will be explained with reference to the following drawings.
FIG. 1A illustrates a plan view of a related art liquid crystal display device, and FIG. 1B illustrates a sectional view taken along line I-I′ of FIG. 1A.
As shown in FIGS. 1A and 1B, a liquid crystal display device including a storage capacitor formed by the storage on common method. The device includes an array substrate having a gate line crossing a data line to define a pixel region; a switching device formed at a crossing point of the two lines; a pixel electrode connected to the switching device and formed in the pixel region; and a storage capacitor parallel to the gate line in a predetermined portion of the pixel region.
The array substrate will be explained in more detail with a fabricating method. First, a conductive material such as Al, Al alloy, etc. is deposited on an entire surface of a substrate 10 and patterned by a photolithography method, so that a gate line 11, a gate electrode 11a, and a capacitor lower electrode 11c parallel to the gate line 11 are formed.
At this time, to obtain a storage capacitor having a large capacity, the size of the capacitor lower electrode 11c is set to be large.
Then, an inorganic insulating film is deposited on an entire surface including the gate line 11, thereby forming a gate insulating film 12. A semiconductor layer 13 is then formed as an independent island shape on the gate insulating film 12 above the gate electrode 11a. 
Subsequently, a conductive material such as Al or Al alloy is deposited on an entire surface including the semiconductor layer 13, and patterned by a lithography method, so that a data line 14 crossing the gate line 11, source/drain electrodes 14a and 14b at both ends of the semiconductor layer 13, and a capacitor upper electrode 14c facing the capacitor lower electrode 11c are simultaneously formed.
At this time, the gate line 11 and the data line 14 cross each other, thereby defining a pixel region. Also, the gate electrode 11a, the gate insulating film 12, the semiconductor layer 13, and the source/drain electrodes 14a and 14b are formed at crossing points of the two lines, thereby constituting a switching device. The switching device is a semiconductor layer and mainly composed of amorphous thin film transistor (a-si TFT) having amorphous silicon material.
Also, the capacitor lower electrode 11c, the gate insulating film 12, and the capacitor upper electrode 14c constitute a storage capacitor, thereby maintaining an electrified charge in a liquid crystal.
That is, as shown in FIG. 2, a parasitic capacitance Cgs is generated at an overlapped part of the gate electrode G and the source/drain electrodes S/D. The parasitic capacitance generates a direct current voltage offset for an alternating current voltage, that is V. Since the direct current voltage offset causes effects such as a flicker, image sticking, and unequal screen brightness, a storage capacitor is designed to reduce a variation of □V.
Especially if the capacitance of a capacitor is increased, picture quality is remarkably enhanced, which is achieved by enlarging areas of capacitor upper and lower electrodes. However, the larger the areas of the capacitor electrodes, the lower the aperture ratio, thereby limiting the increase of in the capacitance of the capacitor.
In FIG. 2, D.L is a data line to which a signal voltage is applied, G.L is a gate line to which an injection signal is applied, Clc is a capacitance by a liquid crystal between a pixel electrode and a common electrode (Vcom), and Cst is a storage capacitance formed between the capacitor upper electrode and the lower electrode (Vst).
Referring to FIG. 1B, subsequently, benzocyclobutene (BCB) is deposited to a predetermined thickness on an entire surface including the data line 14, thereby forming a passivation film 15. The passivation film 15 is selectively removed, so that a first contact hole 17 for exposing a part of a drain electrode 14b and a second contact hole 18 for exposing a part of a capacitor upper electrode 14c are formed.
Then, a pixel electrode of indium tin oxide (ITO) material is formed to connect to the drain electrode 14b and the capacitor upper electrode 14c through the first and second contact holes 17 and 18.
Finally, though not shown, a color filter substrate including a black matrix, a color filter layer of R, G, and B, and a common electrode of ITO material are bonded to the array substrate on which the aforementioned patterns are formed. Also, a liquid crystal is injected into a space corresponding to about several micrometers between the array substrate and the color filter substrate, thereby completing the fabrication of a liquid crystal display device.
However, the related art array substrate of a liquid crystal display device has the following problems.
First, the capacity of a storage capacitor is determined by an area of an electrode consisting of the capacitor. The more a region of the capacitor is increased, the lower the aperture ratio. Therefore, a great deal of bright backlight is expended to display the same brightness, thereby increasing power consumption.
Second, corresponding to a recent trend of a high resolution of a liquid crystal display, a size of a pixel becomes small, which results in making the capacity of a capacitor low. Accordingly, driving characteristics of a device are lowered in such a manner that the voltage greatly decreases and the holding ratio for off-current of a switching device is decreased.